End-to-End Fidelity Analysis of Quantum Circuit Optimization: From Gate-Level Transformations to Pulse-Level Control

TL;DR

This paper provides a detailed analysis of how various quantum circuit optimization techniques affect fidelity, from gate-level to pulse-level, using simulations and hardware experiments on a 20-qubit processor.

Contribution

It introduces a modular framework for analyzing fidelity impacts across the entire quantum compilation stack, including validation on real hardware.

Findings

Gate cancellation improves fidelity significantly, eliminating 14,024 gates.

Pulse duration negatively correlates with process fidelity ($r = -0.74$).

Hardware experiments show 70% gate reduction with 100% success rate.

Abstract

We present a comprehensive analysis of quantum circuit fidelity across the full compilation stack, from high-level gate optimization through pulse-level control. Using a modular integration framework connecting a C++ circuit optimizer with Lindblad-based pulse simulation, we systematically evaluate the fidelity impact of four optimization passes: gate cancellation, commutation, rotation merging, and identity elimination, on IQM Garnet hardware parameters. Our simulation campaign spanning 371 circuit runs reveals that gate cancellation provides the most significant improvement (68\% of circuits improved, 14,024 gates eliminated), while pulse duration exhibits the strongest negative correlation with process fidelity ($r = -0.74$, $R^2 = 0.55$). We validate these findings through hardware execution on the IQM Resonance Garnet 20-qubit processor, demonstrating 70\% gate reduction on QFT circuits with 100\% job success rate (8 executions). Our open-source framework enables reproducible benchmarking of quantum compilation pipelines.