Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures

TL;DR

This paper introduces a comprehensive lifecycle cost-effectiveness framework for multi-chiplet architectures, incorporating redundancy strategies, reliability, and economic trade-offs to optimize long-term performance and costs.

Contribution

It presents a novel Lifecycle Cost Effectiveness (LCE) metric and a comprehensive model that jointly considers redundancy, reliability, and cost optimization for multi-chiplet systems.

Findings

Redundancy-aware cost modeling improves economic evaluation.

Joint optimization of redundancy levels enhances cost efficiency.

Trade-off analysis guides effective redundancy configuration choices.

Abstract

The growing demand for compute-intensive applications has made multi-chiplet architectures a promising alternative to monolithic designs, offering improved scalability and manufacturing flexibility. However, effectively managing the economic effectiveness remains challenging. Existing cost models either overlook the amortization of compute value over a chip's operational lifetime or fail to evaluate how redundancy strategies, which are widely adopted to enhance yield and fault tolerance, impact long-term cost efficiency. This paper presents a comprehensive cost-effectiveness framework for multi-chiplet architectures, introducing a novel Lifecycle Cost Effectiveness (LCE) metric that evaluates amortized compute costs by jointly optimizing manufacturing expenses and operational lifetime. Our approach uniquely integrates: (1) redundancy-aware cost modeling spanning both intra- and inter-chiplet levels, (2) reliability-driven lifetime estimation, and (3) quantitative analysis of how redundancy configurations on overall economic effectiveness. Extensive trade-off and multi-objective optimization studies demonstrate the effectiveness of the model and reveal essential co-optimization strategies between module and chiplet-level redundancy to achieve cost-efficient multi-chiplet architecture designs.