An Ion-Intercalation Memristor for Enabling Full Parallel Writing in Crossbar Networks

TL;DR

This paper presents a novel ion-intercalation memristor that enables full parallel writing in crossbar networks by decoupling read and write paths, overcoming the sneak path problem and enhancing scalability for in-memory computing.

Contribution

Introduction of a new memristor design with orthogonal conductive paths and reversible ion doping, allowing independent read/write operations and improved scalability.

Findings

Devices show near-ideal memristive behavior

Stable performance under isolated read/write conditions

Decoupled read/write enables full parallel writing

Abstract

Crossbar architectures have long been seen as a promising foundation for in-memory computing, using memristor arrays for high-density, energy-efficient analog computation. However, this conventional architecture suffers from a fundamental limitation: the inability to perform parallel write operations due to the sneak path problem. This arises from the structural overlap of read and write paths, forcing sequential or semi-parallel updates and severely limiting scalability. To address this, we introduce a new memristor design that decouples read and write operations at the device level. This design enables orthogonal conductive paths, and employs a reversible ion doping mechanism, inspired by lithium-ion battery principles, to modulate resistance states independently of computation. Fabricated devices exhibit near-ideal memristive characteristics and stable performance under isolated read/write conditions.