GIC-DLC: Differentiable Logic Circuits for Hardware-Friendly Grayscale Image Compression

TL;DR

GIC-DLC introduces a hardware-aware grayscale image codec that combines neural network flexibility with Boolean efficiency, achieving better compression and lower energy use on edge devices.

Contribution

This work presents a novel differentiable logic circuit-based codec that is both neural network flexible and hardware-efficient for grayscale image compression.

Findings

Outperforms traditional codecs in compression efficiency.

Reduces energy consumption and latency significantly.

Demonstrates hardware-friendly learned compression on edge devices.

Abstract

Neural image codecs achieve higher compression ratios than traditional hand-crafted methods such as PNG or JPEG-XL, but often incur substantial computational overhead, limiting their deployment on energy-constrained devices such as smartphones, cameras, and drones. We propose Grayscale Image Compression with Differentiable Logic Circuits (GIC-DLC), a hardware-aware codec where we train lookup tables to combine the flexibility of neural networks with the efficiency of Boolean operations. Experiments on grayscale benchmark datasets show that GIC-DLC outperforms traditional codecs in compression efficiency while allowing substantial reductions in energy consumption and latency. These results demonstrate that learned compression can be hardware-friendly, offering a promising direction for low-power image compression on edge devices.