Scaling Two-Dimensional Semiconductor Nanoribbons for High-Performance Electronics
Hao-Yu Lan, Shao-Heng Yang, Yongjae Cho, Yuanqiu Tan, Jun Cai, Zheng Sun, Chenyang Li, Lin-Yun Huang, Yi Wan, Lain-Jong Li, Thomas Beechem, Joerg Appenzeller, and Zhihong Chen

TL;DR
This study demonstrates that scaling monolayer MoS2 nanoribbon transistors down to 30-40 nm enhances performance metrics like on-current density and subthreshold swing, promising for future ultra-scaled electronics.
Contribution
It reveals that reducing channel width in monolayer TMD nanoribbon FETs improves device performance and contact resistance, extending the platform to other TMD materials.
Findings
Channel width reduction increases on-current density by ~42%.
Subthreshold swing decreases by ~16% with narrower ribbons.
Contact resistance drops from ~860 Ωμm to ~270 Ωμm.
Abstract
As silicon transistors scale toward future technology nodes, three-dimensional architectures -- including gate-all-around (GAA) nanoribbon and complementary field-effect transistors (CFETs) -- require channel widths in the tens of nanometers to meet density targets. Monolayer transition metal dichalcogenides (TMDs), with their atomically thin bodies, are promising channel materials for these architectures, yet most TMD-based FETs remain limited to micrometer-scale widths. Here, we show that channel width scaling of monolayer MoS2 nanoribbon transistors not only preserves but also enhances device performance. Reducing the channel width from hundreds of nanometers to 30--40 nm increases the median on-current density by 42% and reduces the median subthreshold swing by 16%, with a champion device reaching 995 A m at a drain-to-source voltage of 1 V and an…
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