CPU-less parallel execution of lambda calculus in digital logic
Harry Fitchett, Charles Fox

TL;DR
This paper proposes a novel CPU-less architecture that compiles lambda calculus directly into digital logic, enabling parallel execution of functional programs without traditional CPUs.
Contribution
It introduces a new model of functional hardware that executes lambda calculus in parallel using digital logic, bypassing CPU bottlenecks.
Findings
Demonstrated successful execution of lambda expressions in simulation.
Showed potential for scaling to larger functional languages.
Implemented a proof-of-concept system with parallel beta-reduction.
Abstract
While transistor density is still increasing, clock speeds are not, motivating the search for new parallel architectures. One approach is to completely abandon the concept of CPU -- and thus serial imperative programming -- and instead to specify and execute tasks in parallel, compiling from programming languages to data flow digital logic. It is well-known that pure functional languages are inherently parallel, due to the Church-Rosser theorem, and CPU-based parallel compilers exist for many functional languages. However, these still rely on conventional CPUs and their von Neumann bottlenecks. An alternative is to compile functional languages directly into digital logic to maximize available parallelism. It is difficult to work with complete modern functional languages due to their many features, so we demonstrate a proof-of-concept system using lambda calculus as the source language…
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Taxonomy
TopicsLogic, programming, and type systems · Parallel Computing and Optimization Techniques · Advanced Database Systems and Queries
