Growth and Morphology of InN Nanowires on Si<111> and Si<100> at Back-End-Of-Line Compatible Temperatures

TL;DR

This study demonstrates the growth of high-quality InN nanowires on Si<111> and Si<100> substrates at temperatures compatible with back-end-of-line processing, highlighting differences in nucleation and morphology influenced by substrate orientation and buffer layer properties.

Contribution

It provides new insights into InN nanowire growth on silicon substrates at low temperatures, showing improved uniformity on Si<100> and supporting integration into silicon-based devices.

Findings

Nanowires grow with similar trends in diameter, density, and length on both substrates.

Nanowires on Si<100> show better uniformity and less tapering.

Different nucleation behaviors are observed on Si<111> and Si<100> due to substrate and buffer layer properties.

Abstract

InN nanowires were grown on Si<111> and Si<100> substrates by plasma-assisted molecular beam epitaxy using a thin AlN buffer layer at temperatures compatible with the thermal budget limitation imposed by Back-End-Of-Line processing. Reflection high-energy electron diffraction reveals different nucleation behaviors on the two substrate orientations, with higher structural disorder in the case of Si<100>. However, vertically aligned nanowires with hexagonal cross section and N polarity are obtained on both substrates. A statistical analysis of nanowire morphology as a function of growth temperature indicates similar trends in diameter, density, and length on Si<111> and Si<100>, which are explained by adatom kinetics during growth. Nanowires on Si<100> exhibit improved uniformity and reduced tapering, attributed to the different nanowire nucleation due to microstructural properties of the AlN buffer layer. The results demonstrate the feasibility of growing high-quality InN nanowires on Si<100>, supporting their potential for monolithic integration of nanowire-based photodetectors on silicon.