Architectural Classification of XR Workloads: Cross-Layer Archetypes and Implications

TL;DR

This paper classifies XR workloads into archetypes using a cross-layer approach, providing insights and design guidelines for optimizing next-generation XR SoCs to meet low-latency, power, and area constraints.

Contribution

It introduces a systematic cross-layer classification of XR workloads and derives architectural insights for designing efficient XR accelerators.

Findings

Identified key XR workload archetypes such as capacity-limited and overhead-sensitive.

Provided design guidelines emphasizing phase-aware scheduling and elastic resource allocation.

Highlighted the need to move beyond generic resource scaling for XR system efficiency.

Abstract

Edge and mobile platforms for augmented and virtual reality, collectively referred to as extended reality (XR) must deliver deterministic ultra-low-latency performance under stringent power and area constraints. However, the diversity of XR workloads is rapidly increasing, characterized by heterogeneous operator types and complex dataflow structures. This trend poses significant challenges to conventional accelerator architectures centered around convolutional neural networks (CNNs), resulting in diminishing returns for traditional compute-centric optimization strategies. Despite the importance of this problem, a systematic architectural understanding of the full XR pipeline remains lacking. In this paper, we present an architectural classification of XR workloads using a cross-layer methodology that integrates model-based high-level design space exploration (DSE) with empirical profiling on commercial GPU and CPU hardware. By analyzing a representative set of workloads spanning 12 distinct XR kernels, we distill their complex architectural characteristics into a small set of cross-layer workload archetypes (e.g., capacity-limited and overhead-sensitive). Building on these archetypes, we further extract key architectural insights and provide actionable design guidelines for next-generation XR SoCs. Our study highlights that XR architecture design must shift from generic resource scaling toward phase-aware scheduling and elastic resource allocation in order to achieve greater energy efficiency and high performance in future XR systems.