Noise tailoring for error mitigation and for diagnozing digital quantum computers

TL;DR

This paper introduces Noise Tailoring, a method to modify noise in quantum gates to improve error mitigation, and demonstrates its potential both in simulations and on real quantum hardware for better error characterization.

Contribution

The paper presents Noise Tailoring, a novel approach to modify two-qubit gate noise, enhancing error mitigation and enabling better hardware error diagnostics.

Findings

NT+EM improves accuracy up to 5 times over EM alone in simulations

NT method helps characterize non-Markovian and small error sources on real hardware

Classical emulation confirms the effectiveness of the NT protocol

Abstract

Error mitigation (EM) methods are crucial for obtaining reliable results in the realm of noisy intermediate-scale quantum (NISQ) computers, where noise significantly impacts output accuracy. Some EM protocols are particularly efficient for specific types of noise. Yet the noise in the actual hardware may not align with that. In this article, we introduce Noise Tailoring (NT) -- an innovative strategy designed to modify the structure of the noise associated with two-qubit gates through statistical sampling. We perform classical emulation of the protocol behavior and find that the NT+EM results can be up to 5 times more accurate than the results of EM alone for realistic Pauli noise acting on two-qubit gates. At the same time, on actual IBM quantum computers, the NT method falls victim to various small error sources beyond Markovian Pauli noise. We propose to use the NT method for characterizing such error sources on quantum computers in order to inform hardware development.