Low-Complexity Planar Beyond-Diagonal RIS Architecture Design Using Graph Theory

TL;DR

This paper uses graph theory to identify low-complexity, planar BD-RIS architectures suitable for double-layer PCBs, balancing flexibility and fabrication feasibility.

Contribution

It introduces a graph-theoretic approach to characterize and select planar-connected BD-RIS architectures with maximum degrees of freedom.

Findings

Identified BD-RIS architectures realizable on double-layer PCBs.

Characterized architectures with the highest degrees of freedom.

Provided insights for practical RIS design under fabrication constraints.

Abstract

Reconfigurable intelligent surfaces (RISs) enable programmable control of the wireless propagation environment and are key enablers for future networks. Beyond-diagonal RIS (BD-RIS) architectures enhance conventional RIS by interconnecting elements through tunable impedance components, offering greater flexibility with higher circuit complexity. However, excessive interconnections between BD-RIS elements require multi-layer printed circuit board (PCB) designs, increasing fabrication difficulty. In this letter, we use graph theory to characterize the BD-RIS architectures that can be realized on double-layer PCBs, denoted as planar-connected RISs. Among the possible planar-connected RISs, we identify the ones with the most degrees of freedom, expected to achieve the best performance under practical constraints.