Integrated magnonic chip using cascaded logic

TL;DR

This paper presents an integrated magnonic circuit that uses engineered nonlinearity to enable phase-insensitive logic operations, signal normalization, and cascading, advancing magnonics towards scalable, low-energy on-chip computing.

Contribution

It introduces a novel nonlinear approach in nanoscale yttrium iron garnet waveguides that achieves phase-insensitive logic and signal normalization, enabling scalable magnonic logic circuits.

Findings

Demonstrated reconfigurable AND, OR, and majority gates

Achieved deterministic cascading of logic stages

Operates at gigahertz frequencies with dynamic reconfiguration

Abstract

The transistor transformed not only electronics but everyday life, and the integrated circuit - now simply the "chip" - made computation scalable and ubiquitous. Magnonics has long promised a parallel path to low-energy information processing by using spin waves instead of charge. Progress, however, has been limited by two fundamental obstacles: intrinsic attenuation of spin waves and the requirement for precisely normalised output intensity and input phase to ensure reliable logic operation - conditions that are difficult to maintain in large-scale circuits owing to inevitable imperfections. Here, we report an integrated magnonic circuit that overcomes both limitations through engineered nonlinearity in nanoscale yttrium iron garnet waveguides. Nonlinear self-adjustment of the spin wave phase renders logic operation insensitive to the relative phases of the inputs, while a deeply nonlinear, threshold-activated self-normalised excitation restores and standardises the output intensity. Using space-resolved micro-focused Brillouin light scattering, we demonstrate reconfigurable AND, OR and three-input majority gates and realise deterministic cascading across sequential stages, establishing a scalable on-chip logic primitive. The architecture operates with gigahertz frequencies, supports dynamic threshold control for functional reconfiguration, and is compatible with scalable integration, making it attractive for adaptive and neuromorphic computing. By resolving phase-independent operation and signal restoration at the level of device physics, this work advances magnonics from isolated proof-of-concept devices towards integrated magnonic chips that can complement advanced CMOS in energy-constrained computing tasks.