Image Synthesis Using Spintronic Deep Convolutional Generative Adversarial Network
Saumya Gupta, Abhinandan, Venkatesh vadde, Bhaskaran Muralidharan, and Abhishek Sharma

TL;DR
This paper introduces a hybrid CMOS-spintronic DCGAN architecture for energy-efficient synthetic image generation, integrating spintronic hardware with neural network components to improve performance and reduce energy consumption.
Contribution
It presents a novel spintronic hardware implementation of DCGAN, including restructured deconvolution layers and hybrid CMOS spintronic activation functions, enabling efficient image synthesis.
Findings
Achieved FID scores of 27.5 for Fashion MNIST and 45.4 for Anime Face datasets.
Demonstrated low energy consumption of 0.192 pJ for activation functions.
Enabled adaptability to grayscale and colored datasets.
Abstract
The computational requirements of generative adversarial networks (GANs) exceed the limit of conventional Von Neumann architectures, necessitating energy efficient alternatives such as neuromorphic spintronics. This work presents a hybrid CMOS-spintronic deep convolutional generative adversarial network (DCGAN) architecture for synthetic image generation. The proposed generative vision model approach follows the standard framework, leveraging generator and discriminators adversarial training with our designed spintronics hardware for deconvolution, convolution, and activation layers of the DCGAN architecture. To enable hardware aware spintronic implementation, the generator's deconvolution layers are restructured as zero padded convolution, allowing seamless integration with a 6-bit skyrmion based synapse in a crossbar, without compromising training performance. Nonlinear activation…
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Taxonomy
TopicsGenerative Adversarial Networks and Image Synthesis · Physical Unclonable Functions (PUFs) and Hardware Security · Advanced Memory and Neural Computing
