A 2.5 $\mu$W 30 nV/$\surd$Hz Instrumentation Amplifier for Bioimpedance Sensors with Source Degenerated Current Mirror and DTMOS Transistor

TL;DR

This paper presents a ultra-low-power, low-noise instrumentation amplifier specifically designed for bioimpedance sensors, achieving significant noise reduction and power savings through innovative circuit techniques.

Contribution

It introduces a novel combination of source-degenerated current mirror and DTMOS transistors to improve noise performance and reduce power consumption in bioimpedance sensing amplifiers.

Findings

Achieves 30 nV/√Hz input-referred noise floor

Consumes only 2.5 μW power from 0.8 V supply

Reduces power consumption by 32.4% compared to baseline

Abstract

This paper proposes a low-power and low-noise instrumentation amplifier (IA) tailored for bioimpedance sensing applications. The design originates from a gain-boosted flipped voltage follower (FVF) transconductance (TC) stage and integrates two complementary circuit techniques to improve the noise performance. To achieve an optimal balance between input-referred noise and available voltage headroom, a source-degenerated current mirror (SDCM) is adopted, resulting in reducing the input-referred noise by 7.95% compared with a conventional current mirror structure. In addition, a dynamic threshold MOSFET (DTMOS) scheme is employed to enhance the effective transconductance, leading to a further 11.66% reduction in input-referred noise. Simulated in a 28 nm CMOS process demonstrate that the proposed IA achieves an input-referred noise floor of 30 nV/$\surd$Hz and a bandwidth of 1.44 MHz, while consuming only 2.5 $\mu$W from a 0.8 V supply. Compared to the baseline design, the proposed approach achieves a 32.4% reduction in power consumption without degrading noise performance. The complete design parameters are open-sourced in this paper, to ensure reproducibility and facilitate future developments.