DEFT: Differentiable Automatic Test Pattern Generation

TL;DR

DEFT introduces a differentiable, gradient-based ATPG method reformulating test pattern generation as a continuous optimization problem, significantly improving fault detection efficiency and pattern reduction.

Contribution

This paper presents DEFT, a novel differentiable ATPG approach that leverages continuous optimization and GPU acceleration to enhance test pattern effectiveness for hard-to-detect faults.

Findings

Reduced pattern count by 27.3% on average compared to commercial tools.

Generated patterns with 19.3% fewer bits while detecting 35% more faults.

Demonstrated scalability and stability on deep circuit graphs.

Abstract

Modern IC complexity drives test pattern growth, with the majority of patterns targeting a small set of hard-to-detect (HTD) faults. This motivates new ATPG algorithms to improve test effectiveness specifically for HTD faults. This paper presents DEFT (Differentiable Automatic Test Pattern Generation), a new ATPG approach that reformulates the discrete ATPG problem as a continuous optimization task. DEFT introduces a mathematically grounded reparameterization that aligns the expected continuous objective with discrete fault-detection semantics, enabling reliable gradient-based pattern generation. To ensure scalability and stability on deep circuit graphs, DEFT integrates a custom CUDA kernel for efficient forward-backward propagation and applies gradient normalization to mitigate vanishing gradients. Compared to a leading commercial tool on a wide range of benchmarks, DEFT reduced the pattern count by 27.3% on average and by up to 75.9%. DEFT also supports practical ATPG settings such as partial assignment pattern generation, producing patterns with 19.3% fewer 0/1 bits while still detecting 35% more faults. These results indicate DEFT is a promising and effective ATPG engine, offering a valuable complement to existing heuristics.