Hf/Zr Superlattice-Based High-\k{appa} Gate Dielectrics with Dipole Layer Engineering for Advanced CMOS
Taeyoung Song, Sanghyun Kang, Yu Hsin Kuo, Jiayi Chen, Lance Fernandes, Nashrah Afroze, Mengkun Tian, Hyoung Won Baac, Changhwan Shin, Asif Islam Khan

TL;DR
This paper presents Hf/Zr superlattice-based high-k gate dielectrics with dipole layer engineering that achieve sub-nanometer EOT, high Vth tunability, and stability, advancing CMOS technology beyond 1 nm scale.
Contribution
It introduces a novel Hf/Zr superlattice dielectric with embedded dipole layers that surpass conventional dielectrics in EOT, Vth tunability, and stability, compatible with high-temperature processing.
Findings
Achieved EOT of 7.3 Å with HZH superlattice after annealing.
Embedded Al2O3 dipole reduces EOT to 8.4 Å and enables Vth tuning.
Demonstrated stable Vth with minimal drift under bias stress.
Abstract
Advanced logic transistors require gate dielectrics that achieve sub-nanometer equivalent oxide thickness (EOT), suppress leakage, and satisfy three key requirements: (i) compatibility with RMG-like high-temperature processing, (ii) sufficient Vth tunability for multi-Vth design, and (iii) high device reliability. However, meeting all of these requirements simultaneously has been difficult with conventional high-k systems. In this work, we demonstrate that Hf/Zr-based gate stacks quantitatively satisfy these conditions. After a 700 C N2 anneal, the HZH superlattice achieves an EOT of 7.3 A, lower than conventional HfO2-only stacks (8.5 A) while maintaining comparable leakage. Embedding a 3 A Al2O3 dipole within an HfO2/ZrO2/HfO2 superlattice (HZHA) breaks the conventional dipole trade-off, achieving an EOT of 8.4 A, lower than the 9.0 A of a standard HfO2/Al2O3 stack, while providing a…
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Taxonomy
TopicsSemiconductor materials and devices · Ferroelectric and Negative Capacitance Devices · Advancements in Semiconductor Devices and Circuit Design
