Low-Latency and Low-Complexity MLSE for Short-Reach Optical Interconnects

TL;DR

This paper introduces a simplified MLSE algorithm for optical interconnects that significantly reduces latency and computational complexity while maintaining high BER performance in high-speed PAM4 transmission.

Contribution

The paper proposes a novel simplified MLSE with parallel sliding block architecture and reduced state, achieving lower latency and complexity without sacrificing performance.

Findings

Latency reduced from 34 to 7 delay units

Number of multipliers decreased from 512 to 33

BER performance remains nearly unchanged

Abstract

To meet the high-speed, low-latency, and low-complexity demand for optical interconnects, simplified maximum likelihood sequence estimation (MLSE) is proposed in this paper. Simplified MLSE combines computational simplification and reduced state in MLSE. MLSE with a parallel sliding block architecture reduces latency from linear order to logarithmic order. Computational simplification reduces the number of multipliers from exponential order to linear order. Incorporating the reduced state with computational simplification further decreases the number of adders and comparators. The simplified MLSE is evaluated in a 112-Gbit/s PAM4 transmission over 2-km standard single-mode fiber. Experimental results show that the simplified MLSE significantly outperforms the FFE-only case in bit error ratio (BER) performance. Compared with simplified 1-step MLSE, the latency of simplified MLSE is reduced from 34 delay units in linear order to 7 delay units in logarithmic order. The simplified scheme in MLSE reduces the number of variable multipliers from 512 in exponential order to 33 in linear order without BER performance deterioration, while reducing the number of adders and comparators to 37.2% and 8.4%, respectively, with nearly identical BER performance.