Fast Online Digital Twinning on FPGA for Mission Critical Applications

TL;DR

This paper presents an FPGA-based digital twinning framework that enables real-time, low-latency simulation for mission-critical applications like collision avoidance, demonstrating significant speed improvements on edge devices.

Contribution

It introduces a novel FPGA-accelerated digital twinning system that offloads neural components for fast, real-time operation in safety-critical scenarios.

Findings

Achieves five times faster response than human reaction time

Operates efficiently on edge devices with low latency

Validates practical deployment for safety-critical applications

Abstract

Digital twinning enables real-time simulation and predictive modeling by maintaining a continuously updated virtual representation of a physical system. In mission-critical applications, such as mid-air collision avoidance, these models must operate online with extremely low latency to ensure safety. However, executing complex Model Recovery (MR) pipelines on edge devices is limited by computational and memory bandwidth constraints. This paper introduces a fast, FPGA-accelerated digital twinning framework that offloads key neural components, including gated recurrent units (GRU) and dense layers, to reconfigurable hardware for efficient parallel execution. Our system achieves real-time responsiveness, operating five times faster than typical human reaction time, and demonstrates the practical viability of deploying digital twins on edge platforms for time-sensitive, safety-critical environments.