Vertical NAND in a Ferroelectric-driven Paradigm Shift
Giuk Kim, Hyojun Choi, Prasanna Venkat Ravindran, Moonyoung Jung, Sanghyun Park, Kijoon Kim, Suhwan Lim, Kwangyou Seo, Kwangsoo Kim, Wanki Kim, Daewon Ha, Sukjoong Shin, Asif Khan, Sanghun Jeon, and Kai Ni

TL;DR
This paper proposes a hybrid ferroelectric-driven NAND architecture that combines ferroelectric polarization with charge trapping to enable scalable, low-voltage, energy-efficient flash memory beyond current physical and architectural limits.
Contribution
It introduces a novel hybrid architecture that leverages ferroelectric polarization and charge trapping for improved scalability and energy efficiency in NAND flash memory.
Findings
Enables integration of over 1000 layers without process compromise
Provides low-voltage operation through polarization-enhanced tunneling
Reconfigures flash memory foundations for next-generation scalability
Abstract
Over the past decades, the relentless scaling and mass production of flash memory have underpinned the data-centric era. Yet charge-trap-based 3D NAND flash is now constrained by intrinsic physical and architectural limits, including reliability degradation at the device level, high operating power at the array level, and vertical scaling saturation at the system level. These bottlenecks hinder further advances in storage density and energy efficiency required by memory-centric computing. This Perspective outlines how coupling ferroelectric polarization with charge trapping can reconfigure the foundations of flash memory. In these hybrid architectures, polarization offers an energy-efficient pathway for charge modulation through enhanced Fowler-Nordheim tunneling, while trapped charges reinforce polarization-driven states to ensure stability. Such synergistic dynamics enable low-voltage…
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Taxonomy
TopicsFerroelectric and Negative Capacitance Devices · Ferroelectric and Piezoelectric Materials · Electronic and Structural Properties of Oxides
