Fault-tolerant multi-qubit gates in Parity Codes

TL;DR

This paper introduces efficient methods for implementing fault-tolerant multi-qubit gates in quantum error correction codes using parity qubits, enabling high-weight rotations and logical CNOTs with parallelization.

Contribution

It presents novel techniques for fault-tolerant multi-qubit gates in concatenated codes, avoiding complex routing and lattice surgery.

Findings

Fault-tolerant high-weight rotation gates demonstrated

Transversal CNOT gates enable logical parity operations

Operations can be parallelized without lattice surgery

Abstract

We present a set of efficiently implementable logical multi-qubit gates in concatenated quantum error correction codes using parity qubits. In particular, we show how fault-tolerant high-weight rotation gates of arbitrary angle can be implemented on single physical qubits of a classical stabilizer code, or on localized regions of full quantum error correction codes. Similarly, we show how transversal CNOT gates can implement logical parity-controlled-NOT operations between arbitrarily many logical qubits. Both operation types can be implemented and in many cases parallelized without the use of lattice surgery or the need for complicated routing operations.