An Optimal Alignment-Driven Iterative Closed-Loop Convergence Framework for High-Performance Ultra-Large Scale Layout Pattern Clustering
Shuo Liu

TL;DR
This paper introduces an efficient, optimal alignment-driven iterative framework for high-performance clustering of large-scale layout patterns in VLSI design, significantly improving speed and accuracy over existing methods.
Contribution
It presents a novel hybrid alignment algorithm and a set cover-based clustering model with a multi-stage pruning mechanism, enabling scalable and precise pattern clustering.
Findings
Achieved over 100x speedup compared to baseline.
Reduced data complexity by 93.4% through clustering.
Secured First Place in the 2025 China Postgraduate EDA Challenge.
Abstract
With the aggressive scaling of VLSI technology, the explosion of layout patterns creates a critical bottleneck for DFM applications like OPC. Pattern clustering is essential to reduce data complexity, yet existing methods struggle with computational prohibitiveness ( comparisons), sub-optimal discrete sampling for center alignment, and difficult speed-quality trade-offs. To address these, we propose an Optimal Alignment-Driven Iterative Closed-Loop Convergence Framework. First, to resolve alignment ambiguity, we introduce a hybrid suite of high-performance algorithms: an FFT-based Phase Correlation method for cosine similarity constraints, and a Robust Geometric Min-Max strategy for edge displacement constraints that analytically solves for the global optimum. Second, we model clustering as a Set Cover Problem (SCP) using a Surprisal-Based Lazy Greedy heuristic within a…
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Taxonomy
TopicsVLSI and FPGA Design Techniques · Graph Theory and Algorithms · Advancements in Photolithography Techniques
