KANEL\'E: Kolmogorov-Arnold Networks for Efficient LUT-based Evaluation

TL;DR

KANEL'E introduces a novel FPGA framework leveraging Kolmogorov-Arnold Networks with LUT-based implementation, achieving significant speedups and resource efficiency for neural network inference in real-time, low-power applications.

Contribution

This work presents the first systematic design flow for FPGA deployment of KANs, combining training, quantization, and pruning for optimized LUT-based neural network inference.

Findings

Achieves up to 2700x speedup over prior approaches

Demonstrates significant resource savings on FPGA

Outperforms other LUT-based architectures on benchmarks

Abstract

Low-latency, resource-efficient neural network inference on FPGAs is essential for applications demanding real-time capability and low power. Lookup table (LUT)-based neural networks are a common solution, combining strong representational power with efficient FPGA implementation. In this work, we introduce KANEL\'E, a framework that exploits the unique properties of Kolmogorov-Arnold Networks (KANs) for FPGA deployment. Unlike traditional multilayer perceptrons (MLPs), KANs employ learnable one-dimensional splines with fixed domains as edge activations, a structure naturally suited to discretization and efficient LUT mapping. We present the first systematic design flow for implementing KANs on FPGAs, co-optimizing training with quantization and pruning to enable compact, high-throughput, and low-latency KAN architectures. Our results demonstrate up to a 2700x speedup and orders of magnitude resource savings compared to prior KAN-on-FPGA approaches. Moreover, KANEL\'E matches or surpasses other LUT-based architectures on widely used benchmarks, particularly for tasks involving symbolic or physical formulas, while balancing resource usage across FPGA hardware. Finally, we showcase the versatility of the framework by extending it to real-time, power-efficient control systems.