The PPKN Gate: An Optimal 1-Toffoli Input-Preserving Full Adder for Quantum Arithmetic

TL;DR

This paper introduces the PPKN gate, a new quantum full adder design that reduces quantum cost and logical depth compared to the standard HNG gate, enabling more efficient quantum arithmetic operations.

Contribution

The paper presents the PPKN gate, a novel input-preserving full adder that outperforms the HNG gate in quantum cost and logical depth, and proposes a modular architecture for n-bit adders.

Findings

PPKN gate has a quantum cost of 10, lower than HNG's 12.

PPKN gate achieves a logical depth of 4, less than HNG's 5.

The modular architecture allows scalable n-bit ripple carry adders.

Abstract

Efficient arithmetic operations are a prerequisite for practical quantum computing. Optimization efforts focus on two primary metrics: Quantum Cost (QC), determined by the number of non-linear gates, and Logical Depth, which defines the execution speed. Existing literature identifies the HNG gate as the standard for Input-Preserving Reversible Full Adders. HNG gate typically requires a QC of 12 and a logical depth of 5, in the area of classical reversible circuits. This paper proposes the PPKN Gate, a novel design that achieves the same inputpreserving functionality using only one Toffoli gate and five CNOT gates. With a Quantum Cost of 10 and a reduced logical depth of 4, the PPKN gate outperforms the standard HNG gate in both complexity and speed. Furthermore, we present a modular architecture for constructing an n-bit Ripple Carry Adder by cascading PPKN modules.