DAPO: Design Structure-Aware Pass Ordering in High-Level Synthesis with Graph Contrastive and Reinforcement Learning

TL;DR

DAPO is a novel framework that combines graph contrastive learning and reinforcement learning to optimize pass ordering in high-level synthesis, significantly improving FPGA design performance.

Contribution

It introduces a design structure-aware approach that extracts semantics, uses contrastive learning for embeddings, and employs an analytical model for hardware estimation to guide optimization.

Findings

Achieves 2.36x speedup over Vitis HLS on average.

Utilizes graph-based semantics and reinforcement learning for tailored optimization.

Demonstrates effectiveness on classic HLS designs.

Abstract

High-Level Synthesis (HLS) tools are widely adopted in FPGA-based domain-specific accelerator design. However, existing tools rely on fixed optimization strategies inherited from software compilations, limiting their effectiveness. Tailoring optimization strategies to specific designs requires deep semantic understanding, accurate hardware metric estimation, and advanced search algorithms -- capabilities that current approaches lack. We propose DAPO, a design structure-aware pass ordering framework that extracts program semantics from control and data flow graphs, employs contrastive learning to generate rich embeddings, and leverages an analytical model for accurate hardware metric estimation. These components jointly guide a reinforcement learning agent to discover design-specific optimization strategies. Evaluations on classic HLS designs demonstrate that our end-to-end flow delivers a 2.36 speedup over Vitis HLS on average.