Characterization of CRYO ASIC for charge readout in the nEXO experiment

TL;DR

This paper evaluates the performance of the CRYO ASIC, a cryogenic charge readout chip, demonstrating its stability, noise performance, and operational viability in liquid xenon for the nEXO experiment.

Contribution

It presents the first comprehensive performance characterization of the CRYO ASIC operating in liquid xenon, confirming its suitability for nEXO's charge readout needs.

Findings

Achieves gain stability better than 0.2% over 24 hours

Maintains low noise levels consistent with design requirements

Operates reliably in LXe with effective boiling mitigation

Abstract

nEXO is a proposed next-generation experiment searching for the neutrinoless double beta decay of $^{136}$Xe using a tonne-scale liquid xenon (LXe) time projection chamber (TPC). To image the ionization signals from events in the liquid xenon, the detector will employ metallized fused-silica charge collection tiles instrumented with cryogenic application-specific integrated circuits (ASICs), referred to as CRYO ASIC, which are designed to operate directly in LXe to minimize input capacitance and pick-up noise. Here we present the performance of the CRYO ASIC mounted on an auxiliary printed circuit board and evaluated both in a cryogenic environmental chamber and in a dedicated LXe test stand. We demonstrate that the ASICs achieve the desired performance at liquid xenon temperatures, showing a gain stability better than 0.2% over 24-hour operation and reliable in-situ calibration using an on-chip pulser. In the LXe test stand, we show that boiling caused by the chip heat dissipation can be mitigated by operating the system above ~0.1 MPa. The in-LXe noise measured agrees with simulation, which indicates it the $150~e^-$ design requirement can be satisfied. These results establish CRYO ASIC as a viable low-noise in-LXe charge readout solution for nEXO.