LUNA: LUT-Based Neural Architecture for Fast and Low-Cost Qubit Readout

TL;DR

LUNA introduces a LUT-based neural architecture that significantly reduces hardware resources and latency for qubit readout, facilitating scalable and efficient quantum computing systems.

Contribution

The paper presents a novel LUT-based neural network design for qubit readout that achieves high speed and low resource usage, outperforming prior hardware implementations.

Findings

Up to 10.95x reduction in area

30% lower latency

Maintains fidelity comparable to state-of-the-art

Abstract

Qubit readout is a critical operation in quantum computing systems, which maps the analog response of qubits into discrete classical states. Deep neural networks (DNNs) have recently emerged as a promising solution to improve readout accuracy . Prior hardware implementations of DNN-based readout are resource-intensive and suffer from high inference latency, limiting their practical use in low-latency decoding and quantum error correction (QEC) loops. This paper proposes LUNA, a fast and efficient superconducting qubit readout accelerator that combines low-cost integrator-based preprocessing with Look-Up Table (LUT) based neural networks for classification. The architecture uses simple integrators for dimensionality reduction with minimal hardware overhead, and employs LogicNets (DNNs synthesized into LUT logic) to drastically reduce resource usage while enabling ultra-low-latency inference. We integrate this with a differential evolution based exploration and optimization framework to identify high-quality design points. Our results show up to a 10.95x reduction in area and 30% lower latency with little to no loss in fidelity compared to the state-of-the-art. LUNA enables scalable, low-footprint, and high-speed qubit readout, supporting the development of larger and more reliable quantum computing systems.