When Forgetting Builds Reliability: LLM Unlearning for Reliable Hardware Code Generation

TL;DR

This paper introduces a novel unlearning framework for large language models in hardware code generation, enabling effective removal of problematic knowledge while maintaining code quality and reliability.

Contribution

The paper presents a syntax-preserving, floor-aware unlearning method tailored for LLMs in hardware design, improving reliability and safety without sacrificing performance.

Findings

Supports forget sets up to 3x larger

Requires only a single training epoch for unlearning

Preserves syntactic correctness and functional integrity

Abstract

Large Language Models (LLMs) have shown strong potential in accelerating digital hardware design through automated code generation. Yet, ensuring their reliability remains a critical challenge, as existing LLMs trained on massive heterogeneous datasets often exhibit problematic memorization of proprietary intellectual property (IP), contaminated benchmarks, and unsafe coding patterns. To mitigate these risks, we propose a novel unlearning framework tailored for LLM-based hardware code generation. Our method combines (i) a syntax-preserving unlearning strategy that safeguards the structural integrity of hardware code during forgetting, and (ii) a fine-grained floor-aware selective loss that enables precise and efficient removal of problematic knowledge. This integration achieves effective unlearning without degrading LLM code generation capabilities. Extensive experiments show that our framework supports forget sets up to 3x larger, typically requiring only a single training epoch, while preserving both syntactic correctness and functional integrity of register-transfer level (RTL) codes. Our work paves an avenue towards reliable LLM-assisted hardware design.