Investigation of the Physical Mechanism behind Retention Loss in FeFETs with MIFIFIS Gate Structure

TL;DR

This paper investigates the physical causes of retention loss in FeFETs with a MIFIFIS gate structure, analyzing energy bands and proposing design modifications to improve device reliability.

Contribution

It provides a detailed physical analysis of retention loss mechanisms in MIFIFIS FeFETs and suggests structural redesigns to significantly reduce retention loss.

Findings

Retention loss can be reduced to 12% by redesigning the gate structure.

Pulse amplitude reduction decreases retention loss to 0.2%.

Energy band analysis reveals electric field effects cause retention loss.

Abstract

A Metal-Gate Blocking Layer (GBL)- Ferroelectric-Tunnel Dielectric Layer (TDL)-Ferroelectric -Channel Insulator (Ch.IL)-Si (MIFIFIS) structure is proposed to achieve a larger MW for applications in Fe-NAND. However, the large retention loss (RL) in the MIFIFIS structure restricts its application. In this work, we vary the physical thickness of the GBL and TDL, and conduct an in-depth analysis of the energy bands of the gate structure to investigate the physical mechanism behind the RL in FeFETs with the MIFIFIS structure. The physical origin of the RL is that the electric field direction across the TDL reduces the potential barrier provided by the ferroelectric near the silicon substrate. Based on the above physical mechanism, the RL can be reduced to 12% and 0.2% by redesigning the gate structure or reducing the pulse amplitude, respectively. Our work contributes to a deeper understanding of the physical mechanism behind the RL in FeFETs with the MIFIFIS gate structure. It provides guidance for enhancing the reliability of FeFETs.