A Spatial Array for Spectrally Agile Wireless Processing
Ali Rasteh, Andrew Hennessee, Ishaan Shivhare, Siddharth Garg, Sundeep Rangan, Brandon Reagen

TL;DR
This paper introduces a reconfigurable spatial array architecture optimized for wireless processing tasks, demonstrating potential to match specialized cores in efficiency and enabling scalable, agile next-generation wireless systems.
Contribution
It proposes a novel reconfigurable spatial array architecture tailored for wireless kernels, evaluated against specialized cores to enhance scalability and spectral agility.
Findings
Reconfigurable array approaches specialized core efficiency in certain conditions.
Design synthesized in 32 nm process shows promising latency and power metrics.
Conditions identified where general-purpose architectures match specialized core performance.
Abstract
Massive MIMO is a cornerstone of next-generation wireless communication, offering significant gains in capacity, reliability, and energy efficiency. However, to meet emerging demands such as high-frequency operation, wide bandwidths, co-existence, integrated sensing, and resilience to dynamic interference, future systems must exhibit both scalability and spectral agility. These requirements place increasing pressure on the underlying processing hardware to be both efficient and reconfigurable. This paper proposes a custom-designed spatial array architecture that serves as a reconfigurable, general-purpose core optimized for a class of wireless kernels that commonly arise in diverse communications and sensing tasks. The proposed spatial array is evaluated against specialized cores for each kernel using High-Level Synthesis (HLS). Both the reconfigurable and specialized designs are…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsEmbedded Systems Design Techniques · Interconnection Networks and Systems · Parallel Computing and Optimization Techniques
