IVE: An Accelerator for Single-Server Private Information Retrieval Using Versatile Processing Elements

TL;DR

This paper introduces IVE, a hardware accelerator that significantly improves the throughput of single-server private information retrieval by optimizing memory access, data reuse, and functional units, enabling practical large-database PIR.

Contribution

The paper presents IVE, a novel accelerator with a versatile functional unit and heterogeneous memory architecture that achieves unprecedented throughput for single-server PIR.

Findings

Up to 1,275x higher throughput compared to prior solutions.

Effective batching and data reuse strategies improve performance.

Scalable architecture supports larger databases without throughput loss.

Abstract

Private information retrieval (PIR) is an essential cryptographic protocol for privacy-preserving applications, enabling a client to retrieve a record from a server's database without revealing which record was requested. Single-server PIR based on homomorphic encryption has particularly gained immense attention for its ease of deployment and reduced trust assumptions. However, single-server PIR remains impractical due to its high computational and memory bandwidth demands. Specifically, reading the entirety of large databases from storage, such as SSDs, severely limits its performance. To address this, we propose IVE, an accelerator for single-server PIR with a systematic extension that enables practical retrieval from large databases using DRAM. Recent advances in DRAM capacity allow PIR for large databases to be served entirely from DRAM, removing its dependence on storage bandwidth. Although the memory bandwidth bottleneck still remains, multi-client batching effectively amortizes database access costs across concurrent requests to improve throughput. However, client-specific data remains a bottleneck, whose bandwidth requirements ultimately limits performance. IVE overcomes this by employing a large on-chip scratchpad with an operation scheduling algorithm that maximizes data reuse, further boosting throughput. Additionally, we introduce sysNTTU, a versatile functional unit that enhances area efficiency without sacrificing performance. We also propose a heterogeneous memory system architecture, which enables a linear scaling of database sizes without a throughput degradation. Consequently, IVE achieves up to 1,275x higher throughput compared to prior PIR hardware solutions.