hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

TL;DR

hls4ml is an open-source platform that converts deep learning models into FPGA and ASIC-compatible code, enabling low-latency, resource-efficient ML inference for scientific and commercial applications.

Contribution

It introduces a flexible, modular tool supporting multiple frameworks and HLS compilers, facilitating hardware acceleration of deep learning models.

Findings

Supports various deep learning frameworks and HLS compilers.

Enables low-latency, resource-efficient ML inference.

Has been adopted in diverse scientific and commercial applications.

Abstract

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.