Exploiting Function-Family Structure in Analog Circuit Optimization

TL;DR

This paper introduces a novel circuit optimization method that leverages pre-trained models encoding physical structure, significantly outperforming traditional Gaussian process surrogates in small-sample regimes and reducing optimization iterations.

Contribution

The paper presents Circuit Prior Network (CPN), combining tabular models with expected improvement, to effectively incorporate physical structure into analog circuit optimization without circuit-specific engineering.

Findings

Achieves R^2 ≈ 0.99 in small samples, outperforming GP-Matern.

Provides 1.05–3.81× higher figure of merit (FoM).

Reduces optimization iterations by 3.34–11.89×.

Abstract

Analog circuit optimization is typically framed as black-box search over arbitrary smooth functions, yet device physics constrains performance mappings to structured families: exponential device laws, rational transfer functions, and regime-dependent dynamics. Off-the-shelf Gaussian-process surrogates impose globally smooth, stationary priors that are misaligned with these regime-switching primitives and can severely misfit highly nonlinear circuits at realistic sample sizes (50--100 evaluations). We demonstrate that pre-trained tabular models encoding these primitives enable reliable optimization without per-circuit engineering. Circuit Prior Network (CPN) combines a tabular foundation model (TabPFN v2) with Direct Expected Improvement (DEI), computing expected improvement exactly under discrete posteriors rather than Gaussian approximations. Across 6 circuits and 25 baselines, structure-matched priors achieve $R^2 \approx 0.99$ in small-sample regimes where GP-Mat\'ern attains only $R^2 = 0.16$ on Bandgap, deliver $1.05$--$3.81\times$ higher FoM with $3.34$--$11.89\times$ fewer iterations, and suggest a shift from hand-crafting models as priors toward systematic physics-informed structure identification. Our code will be made publicly available upon paper acceptance.