An Analytical and Empirical Investigation of Tag Partitioning for Energy-Efficient Reliable Cache
Elham Cheshmikhani, Hamed Farbeh

TL;DR
This paper develops an analytical model to optimize tag partitioning in cache memory, improving energy efficiency and reliability by accurately determining the best split point for various cache configurations.
Contribution
It introduces a convex, differentiable formulation to select the optimal tag-splitting point, validated across diverse cache designs, surpassing prior heuristic approaches.
Findings
Analytical model closely matches experimental results.
Optimal tag-splitting point significantly improves energy efficiency.
Model applies broadly to different cache configurations.
Abstract
Associative cache memory significantly influences processor performance and energy consumption. Because it occupies over half of the chip area, cache memory is highly susceptible to transient and permanent faults, posing reliability challenges. As the only hardware-managed memory module, the cache tag array is the most active and critical component, dominating both energy usage and error rate. Tag partitioning is a widely used technique to reduce tag-access energy and enhance reliability. It divides tag comparison into two phases: first comparing the k lower bits, and then activating only the matching tag entries to compare the remaining higher bits. The key design parameter is the selection of the tag-splitting point k, which determines how many reads are eliminated. However, prior studies have chosen k intuitively, randomly, or empirically, without justification. Even experimentally…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Low-power high-performance VLSI design · Big Data and Digital Economy
