Modeling and Simulation Frameworks for Processing-in-Memory Architectures
Mahdi Aghaei, Saba Ebrahimi, Mohammad Saleh Arafati, Elham Cheshmikhani, Dara Rahmati, Saeid Gorgin, Jungrae Kim

TL;DR
This paper reviews various simulation frameworks for processing-in-memory architectures, emphasizing their roles, differences, and challenges to aid researchers in selecting appropriate tools for PIM design evaluation.
Contribution
It provides a comprehensive categorization and comparison of PIM simulation tools, benchmark suites, and discusses open challenges to advance PIM research methodology.
Findings
Survey of diverse PIM simulators and their features
Analysis of trade-offs in simulation fidelity and scalability
Identification of open challenges in PIM simulation methods
Abstract
Processing-in-Memory (PIM) has emerged as a promising computing paradigm to address the memory wall and the fundamental bottleneck of the von Neumann architecture by reducing costly data movement between memory and processing units. As with any engineering challenge, identifying the most effective solutions requires thorough exploration of diverse architectural proposals, device technologies, and application domains. In this context, simulation plays a critical role in enabling researchers to evaluate, compare, and refine PIM designs prior to fabrication. Over the past decade, a variety of PIM simulators have been introduced, spanning low-level device models, architectural frameworks, and application-oriented environments. These tools differ significantly in fidelity, scalability, supported memory/compute technologies, and benchmark compatibility. Understanding these trade-offs is…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Semiconductor materials and devices · Advanced Memory and Neural Computing
