FPGA-Enabled Modulo ADC with x100 Dynamic-Range Expansion: Hardware Design and Performance Evaluation

TL;DR

This paper introduces an FPGA-based modulo ADC platform that significantly expands dynamic range for high-dynamic-range signals, enabling real-time waveform reconstruction and benchmarking of algorithms within a compact system.

Contribution

The work presents a novel FPGA-enabled modulo ADC architecture with integrated calibration and real-time recovery, advancing HDR signal acquisition technology.

Findings

Achieves over 100x dynamic-range expansion within 400 kHz bandwidth

Maintains fidelity comparable to conventional ADCs

Supports real-time reconstruction and benchmarking of algorithms

Abstract

Conventional analog-to-digital converters (ADCs) fail to capture high-dynamic-range (HDR) signals due to clipping. Modulo ADCs circumvent this limitation by folding the input prior to quantization and algorithmically reconstructing the original waveform. This work presents a field-programmable gate array (FPGA)-based modulo ADC platform for systematic HDR performance evaluation. The mixed-signal architecture integrates a precision analog front end with a 200-MHz FPGA control loop that incorporates multi-bit updates and digital under-compensation calibration, ensuring stable folding and accurate feedback generation. The system achieves more than a hundred-fold dynamic-range expansion within a 400-kHz bandwidth while maintaining fidelity comparable to that of a conventional ADC. A system-on-chip (SoC)-like implementation enables on-board real-time recovery and supports benchmarking of state-of-the-art reconstruction algorithms, providing a compact and practical framework for HDR signal acquisition and evaluation.