No need to calibrate: characterization and compilation for high-fidelity circuit execution using imperfect gates

TL;DR

This paper introduces a rapid characterization and compilation method for high-fidelity two-qubit gates on quantum hardware, reducing calibration effort and improving circuit success rates significantly.

Contribution

It presents a novel approach that replaces iterative calibration with fast gate characterization, enabling scalable, high-fidelity gate set expansion in quantum computing.

Findings

Up to 7X improvement in success probability for quantum Fourier transform circuits.

Up to 9X lower mean-square error in Trotter simulations.

Effective hardware-agnostic gate characterization and compilation method.

Abstract

We propose and validate on real quantum computing hardware a new method for extended two-qubit gate set design, replacing iterative, fine calibration with fast characterization of a small number of gate parameters which are then tracked and corrected in circuit compilation. Coherent contributions to the pulse unitary that would traditionally be considered sources of error are treated as part of the gate definition, and compensated in software via single-qubit rotations. This approach enables rapid device-wide generation of high-fidelity two-qubit entangling gates, which are combined with standard calibrated gates to produce an expanded gate set. We show how these gates are directly usable as part of a quantum compiler, synthesizing generic two-qubit circuit blocks into minimal-duration sequences of the characterized gates interleaved with compensating single-qubit rotations. Benchmarking against circuits compiled using the default $CX$ gate alone on 127-qubit IBM hardware shows up to 7X improvement in success probability for Quantum Fourier Transform circuits up to 26 qubits, and up to 9X lower mean-square error in Trotter simulations of the one-dimensional transverse-field Ising model. Our hardware-agnostic characterization and compilation methodology makes it practical to scale up expressive gate sets on quantum computing architectures while minimizing the need for onerous fine-tuning of low-level control waveforms.