HOPPS: Hardware-Aware Optimal Phase Polynomial Synthesis with Blockwise Optimization for Quantum Circuits

TL;DR

HOPPS is a SAT-based, hardware-aware quantum circuit synthesis method that optimally reduces CNOT count and depth, employing blockwise optimization for large circuits, significantly improving quantum circuit fidelity.

Contribution

The paper introduces HOPPS, a novel optimal synthesis algorithm for {CNOT, Rz} blocks, and an iterative blockwise optimization strategy to enhance scalability for large quantum circuits.

Findings

HOPPS reduces CNOT count by up to 50% and depth by 57.1% in benchmarks.

Iterative blockwise optimization improves large circuit synthesis, reducing CNOT count and depth by over 40%.

HOPPS outperforms existing near-optimal synthesis tools in efficiency.

Abstract

Blocks composed of {CNOT, Rz} are ubiquitous in modern quantum applications, notably in circuits such as QAOA ansatzes and quantum adders. After compilation, many of them exhibit large CNOT counts or depths, which lowers fidelity. Therefore, we introduce HOPPS: a SAT-based hardware-aware optimal phase polynomial synthesis algorithm that could generate {CNOT, Rz} blocks with CNOT count or depth optimality. Sometime {CNOT, Rz} blocks are large, such as in QAOA ansatzes, HOPPS's pursuit of optimality limits its scalability. To address this issue, we introduce an iterative blockwise optimization strategy: large circuits are partitioned into smaller blocks, each block is optimally refined, and the process is repeated for several iterations. Empirical results show that HOPPS is more efficient comparing with existing near optimal synthesis tools. Used as a peephole optimizer, HOPPS reduces the CNOT count by up to 50.0% and the CNOT depth by up to 57.1% under OLSQ. For large QAOA circuit, after mapping by Qiskit, circuit can be reduced CNOT count and depth by up to 44.4% and 42.4% by our iterative blockwise optimization. Index Terms-Phase Polynomial, Quantum Circuit Synthesis, Quantum Circuit Optimization.