Passive acoustic logic via topology-optimized waveguides

TL;DR

This paper introduces a passive mechanical computing approach using topology-optimized waveguides that manipulate acoustic waves for logic operations, enabling scalable, low-power signal processing.

Contribution

It presents a novel topology optimization method to design waveguides that control wave interference for mechanical logic, overcoming slow shape-morphing limitations.

Findings

Optimized waveguides precisely manipulate wave paths for logic functions.

Experimental validation shows logic gates are resilient to non-uniform loads.

Scalable mechanical adder demonstrates potential for complex circuits.

Abstract

Growing energy demands of modern digital devices necessitate alternative, low-power computing mechanisms. When incident loads take the form of acoustic or vibrational waves, the ability to mechanically process information eliminates the need for transduction, paving the way for passive computing. Recent studies have proposed systems that learn and execute mechanical logic through buckling, bistability, and origami-inspired lattices. However, owing to the large timescales of shape morphing, such concepts suffer from slow operation or require active stimulation of adaptive materials. To address these limitations, we present a novel approach to mechanical logic, leveraging the rich dynamics of wave propagation in elastic structures. In lieu of traditional forward-design tools, such as band diagrams and transmission spectra, we employ a multi-faceted topology optimization approach, enabling us to identify candidate waveguide configurations within an extremely large design space. By incorporating voids within an otherwise uniform substrate, the optimized waveguides are able to precisely manipulate wave propagation paths, triggering desirable interferences of the scattered wavefield that culminate in energy localization at readouts corresponding to a given logic function. An experimental setup is used to demonstrate the efficacy of such logic gates and their resilience to non-uniform loading. By implementing these building blocks into a mechanical adder, we demonstrate the scalable deployment of more sophisticated mechanical computing circuits, opening up new avenues in mechanical signal processing and physical computing.