GANGR: GAN-Assisted Scalable and Efficient Global Routing Parallelization

TL;DR

This paper introduces GANGR, a GAN-assisted batching algorithm for global routing in electronic design automation, significantly improving scalability and efficiency with minimal quality loss.

Contribution

It proposes a novel WGAN-based batching method that reduces runtime and enhances parallelization in global routing, outperforming traditional heuristic approaches.

Findings

Up to 40% reduction in routing runtime.

Minimal 0.002% degradation in routing quality.

Effective scalability on ISPD'24 benchmarks.

Abstract

Global routing is a critical stage in electronic design automation (EDA) that enables early estimation and optimization of the routability of modern integrated circuits with respect to congestion, power dissipation, and design complexity. Batching is a primary concern in top-performing global routers, grouping nets into manageable sets to enable parallel processing and efficient resource usage. This process improves memory usage, scalable parallelization on modern hardware, and routing congestion by controlling net interactions within each batch. However, conventional batching methods typically depend on heuristics that are computationally expensive and can lead to suboptimal results (oversized batches with conflicting nets, excessive batch counts degrading parallelization, and longer batch generation times), ultimately limiting scalability and efficiency. To address these limitations, a novel batching algorithm enhanced with Wasserstein generative adversarial networks (WGANs) is introduced in this paper, enabling more effective parallelization by generating fewer higher-quality batches in less time. The proposed algorithm is tested on the latest ISPD'24 contest benchmarks, demonstrating up to 40% runtime reduction with only 0.002% degradation in routing quality as compared to state-of-the-art router.