CorrectHDL: Agentic HDL Design with LLMs Leveraging High-Level Synthesis as Reference

TL;DR

CorrectHDL uses high-level synthesis references to correct and improve LLM-generated HDL designs, ensuring functional correctness while achieving better area and power efficiency compared to traditional methods.

Contribution

The paper introduces CorrectHDL, a novel framework that combines LLMs with HLS references to generate more accurate and efficient HDL designs, addressing hallucination issues.

Findings

HDL designs generated by CorrectHDL are more area and power efficient.

The framework maintains functional correctness of HDL designs.

Approaches human-engineered circuit quality.

Abstract

Large Language Models (LLMs) have demonstrated remarkable potential in hardware front-end design using hardware description languages (HDLs). However, their inherent tendency toward hallucination often introduces functional errors into the generated HDL designs. To address this issue, we propose the framework CorrectHDL that leverages high-level synthesis (HLS) results as functional references to correct potential errors in LLM-generated HDL designs.The input to the proposed framework is a C/C++ program that specifies the target circuit's functionality. The program is provided to an LLM to directly generate an HDL design, whose syntax errors are repaired using a Retrieval-Augmented Generation (RAG) mechanism. The functional correctness of the LLM-generated circuit is iteratively improved by comparing its simulated behavior with an HLS reference design produced by conventional HLS tools, which ensures the functional correctness of the result but can lead to suboptimal area and power efficiency. Experimental results demonstrate that circuits generated by the proposed framework achieve significantly better area and power efficiency than conventional HLS designs and approach the quality of human-engineered circuits. Meanwhile, the correctness of the resulting HDL implementation is maintained, highlighting the effectiveness and potential of agentic HDL design leveraging the generative capabilities of LLMs and the rigor of traditional correctness-driven IC design flows.