Ultra Low Overhead Syndrome Extraction for the Steane code

TL;DR

This paper introduces a dynamic, fault-tolerant syndrome extraction protocol for the Steane code that significantly reduces logical error rates by using optimized circuits and adaptive fault response, outperforming previous methods.

Contribution

The authors develop a new fault-tolerant syndrome extraction protocol with minimal overhead, utilizing optimized circuits and adaptive response to internal faults, achieving improved error suppression.

Findings

Reduces logical error rate by ~14.3% compared to previous Steane method

Reduces logical error rate by ~17.7% compared to Reichardt's method

Uses only 14 CNOTs in the primary circuit and 11 in the recovery circuit

Abstract

We establish a new performance benchmark for the fault-tolerant syndrome extraction of [[7, 1, 3]] Steane code with a dynamic protocol. Our method is built on two highly optimized circuits derived using fault-equivalent ZX-rewrites: a primary fault-tolerant circuit with 14 CNOTs and an efficient non-fault-tolerant recovery circuit with 11 CNOTs. The protocol uses an adaptive response to internal faults, discarding flagged measurements and falling back to the recovery circuit to correct potentially detrimental errors. Monte Carlo simulations confirm the efficiency of our protocol, reducing the logical error rate per cycle by an average of ~14.3% relative to the optimized Steane method [arXiv:2506.17181] and ~17.7% compared to the Reichardt's three-qubit method [arXiv:1804.06995], the leading prior techniques.