Architectural Approaches to Fault-Tolerant Distributed Quantum Computing and Their Entanglement Overheads

TL;DR

This paper compares three architectural approaches for fault-tolerant distributed quantum computing, analyzing their resource overheads and scalability using surface and toric codes.

Contribution

It categorizes and evaluates three distinct architectural types for fault-tolerant DQC, providing insights into their resource scaling and suitability for near-term hardware.

Findings

Type 1 architectures require GHZ states for nonlocal stabilizer measurements.

Type 2 architectures distribute error correction across modules with local stabilizer measurements.

Type 3 architectures enable fault-tolerant operations like transversal gates and lattice surgery.

Abstract

Fault tolerant quantum computation over distributed quantum computing (DQC) platforms requires careful evaluation of resource requirements and noise thresholds. As quantum hardware advances toward modular and networked architectures, various fault tolerant DQC schemes have been proposed, which can be broadly categorized into three architectural types. Type 1 architectures consist of small quantum nodes connected via Greenberger-Horne-Zeilinger (GHZ) states, enabling nonlocal stabilizer measurements. Type 2 architectures distribute a large error correcting code block across multiple modules, with most stabilizer measurements remaining local, except for a small subset at patch boundaries that are performed using nonlocal CNOT gates. Type 3 architectures assign code blocks to distinct modules and can perform fault tolerant operations such as transversal gates, lattice surgery, and teleportation to implement logical operations between code blocks. Using the planar surface code and toric code as representative examples, we analyze how the resource requirements, particularly the number of Bell pairs and the average number of generation attempts, scale with increasing code distance across different architectural designs. This analysis provides valuable insights for identifying architectures well suited to fault tolerant distributed quantum computation under near term hardware and resource constraints.