LOKI: a 0.266 pJ/SOP Digital SNN Accelerator with Multi-Cycle Clock-Gated SRAM in 22nm
Rick Luiken, Lorenzo Pes, Manil Dev Gomony, Sander Stuijk

TL;DR
LOKI is a highly energy-efficient digital SNN accelerator utilizing multi-cycle clock-gated SRAMs, achieving low power consumption and high accuracy on neuromorphic and keyword spotting tasks.
Contribution
This paper introduces LOKI, a novel digital architecture for fully-connected SNNs that leverages multi-cycle clock-gated SRAMs for ultra-low power operation at 22nm.
Findings
Achieves 0.266 pJ/SOP energy efficiency at 0.59 V and 667 MHz.
Attains 98.0% accuracy on N-MNIST with 119.8 nJ/inference.
Achieves 93.0% accuracy on KWS with 546.5 nJ/inference.
Abstract
Bio-inspired sensors like Dynamic Vision Sensors (DVS) and silicon cochleas are often combined with Spiking Neural Networks (SNNs), enabling efficient, event-driven processing similar to biological sensory systems. To realize the low-power constraints of the edge, the SNN should run on a hardware architecture that can exploit the sparse nature of the spikes. In this paper, we introduce LOKI, a digital architecture for Fully-Connected (FC) SNNs. By using Multi-Cycle Clock-Gated (MCCG) SRAMs, LOKI can operate at 0.59 V, while running at a clock frequency of 667 MHz. At full throughput, LOKI only consumes 0.266 pJ/SOP. We evaluate LOKI on both the Neuromorphic MNIST (N-MNIST) and the Keyword Spotting k(KWS) tasks, achieving 98.0 % accuracy at 119.8 nJ/inference and 93.0 % accuracy at 546.5 nJ/inference respectively.
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices · Low-power high-performance VLSI design
