The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead

TL;DR

This paper introduces a model and compiler techniques to identify and eliminate configuration overhead in hardware accelerators, significantly improving performance on open-source architectures.

Contribution

It presents a new model to quantify configuration-bound performance and a compiler abstraction with optimizations to reduce overhead, implemented in MLIR.

Findings

2x average performance improvement on OpenGeMM

Effective elimination of redundant configuration cycles

Automatic hiding of remaining configuration overhead

Abstract

Contemporary compute platforms increasingly offload compute kernels from CPU to integrated hardware accelerators to reach maximum performance per Watt. Unfortunately, the time the CPU spends on setup control and synchronization has increased with growing accelerator complexity. For systems with complex accelerators, this means that performance can be configuration-bound. Faster accelerators are more severely impacted by this overlooked performance drop, which we call the configuration wall. Prior work evidences this wall and proposes ad-hoc solutions to reduce configuration overhead. However, these solutions are not universally applicable, nor do they offer comprehensive insights into the underlying causes of performance degradation. In this work, we first introduce a widely-applicable variant of the well-known roofline model to quantify when system performance is configuration-bound. To move systems out of the performance-bound region, we subsequently propose a domain-specific compiler abstraction and associated optimization passes. We implement the abstraction and passes in the MLIR compiler framework to run optimized binaries on open-source architectures to prove its effectiveness and generality. Experiments demonstrate a geomean performance boost of 2x on the open-source OpenGeMM system, by eliminating redundant configuration cycles and by automatically hiding the remaining configuration cycles. Our work provides key insights in how accelerator performance is affected by setup mechanisms, thereby facilitating automatic code generation for circumventing the configuration wall.