Inductive Loop Analysis for Practical HPC Application Optimization

TL;DR

This paper introduces SILO, a symbolic inductive loop optimization technique that models data accesses to enable automatic parallelization and data movement improvements in scientific computing applications, significantly boosting performance.

Contribution

SILO provides a novel symbolic modeling approach for loop nests, enabling automatic optimizations like parallelization and prefetching that were previously difficult due to low-level data access complexities.

Findings

Achieved up to 12× speedup on scientific kernels

Enabled automatic parallelization of dependent loops

Improved data movement through prefetching and pointer optimization

Abstract

Scientific computing applications heavily rely on multi-level loop nests operating on multidimensional arrays. This presents multiple optimization opportunities from exploiting parallelism to reducing data movement through prefetching and improved register usage. HPC frameworks often delegate fine-grained data movement optimization to compilers, but their low-level representations hamper analysis of common patterns, such as strided data accesses and loop-carried dependencies. In this paper, we introduce symbolic, inductive loop optimization (SILO), a novel technique that models data accesses and dependencies as functions of loop nest strides. This abstraction enables the automatic parallelization of sequentially-dependent loops, as well as data movement optimizations including software prefetching and pointer incrementation to reduce register spills. We demonstrate SILO on fundamental kernels from scientific applications with a focus on atmospheric models and numerical solvers, achieving up to 12$\times$ speedup over the state of the art.