An Area-Efficient 20-100-GHz Phase-Invariant Switch-Type Attenuator Achieving 0.1-dB Tuning Step in 65-nm CMOS

TL;DR

This paper introduces a 65-nm CMOS switch-type attenuator operating from 20 to 100 GHz, featuring phase invariance, small size, and precise tuning with minimal errors, suitable for high-frequency applications.

Contribution

It presents a novel capacitive compensation technique and metal line implementation to achieve wideband, area-efficient, and highly accurate attenuation with minimal phase and amplitude errors.

Findings

Achieves 7.5 dB relative attenuation range with continuous tuning from 20-100 GHz

Insertion loss ranges from 1.6 to 3.8 dB within the band

Amplitude and phase errors are below 0.15 dB and 1.6°, respectively

Abstract

This paper presents a switch-type attenuator working from 20 to 100 GHz. The attenuator adopts a capacitive compensation technique to reduce phase error. The small resistors in this work are implemented with metal lines to reduce the intrinsic parasitic capacitance, which helps minimize the amplitude and phase errors over a wide frequency range. Moreover, the utilization of metal lines also reduces the chip area. In addition, a continuous tuning attenuation unit is employed to improve the overall attenuation accuracy of the attenuator. The passive attenuator is designed and fabricated in a standard 65nm CMOS. The measurement results reveal a relative attenuation range of 7.5 dB with a continuous tuning step within 20-100 GHz. The insertion loss is 1.6-3.8 dB within the operation band, while the return losses of all states are better than 11.5 dB. The RMS amplitude and phase errors are below 0.15 dB and 1.6{\deg}, respectively.