Unifying Qubit Routing Across Diverse Quantum ISAs via Canonical Representation

TL;DR

Canopus introduces a unified, ISA-aware qubit routing framework that leverages canonical two-qubit gate representations to optimize circuit compilation across diverse quantum hardware architectures.

Contribution

This work develops a canonical representation-based framework for qubit routing that supports multiple ISAs, enabling deep co-optimization and reducing overhead.

Findings

Canopus reduces routing overhead by 15%-35% across various ISAs.

The framework models synthesis costs using monodromy polytope theory.

It formalizes commutation relations for two-qubit gates to enhance optimization.

Abstract

Qubit mapping/routing is a critical stage in compilation for both near-term and fault-tolerant quantum computers, yet existing scalable methods typically impose several times the routing overhead in terms of circuit depth or duration. This inefficiency stems from a fundamental disconnect: compilers rely on an abstract routing model (e.g., three-CX-unrolled SWAP insertion) that completely ignores the idiosyncrasies of native gates supported by physical devices. Recent hardware breakthroughs have enabled high-precision implementations of diverse instruction set architectures (ISAs) beyond standard CX-based gates. Advanced ISAs involving gates such as $\mathrm{\sqrt{iSWAP}}$ and $\mathrm{ZZ}(\theta)$ gates offer superior circuit synthesis capabilities and can be realized with higher fidelities. However, systematic compiler optimization strategies tailored to these advanced ISAs are lacking. To address this, we propose Canopus, a unified qubit mapping/routing framework applicable to diverse quantum ISAs. Built upon the canonical representation of two-qubit gates, Canopus centers on qubit routing to perform deep co-optimization in an ISA-aware approach. Canopus leverages the two-qubit canonical representation and the monodromy polytope theory to model the synthesis cost for more intelligent SWAP insertion during qubit routing. We also formalize the commutation relations between two-qubit gates through the canonical form, providing a generalized approach to commutativity-based optimization. Experiments show that Canopus consistently reduces routing overhead by 15%-35% compared to state-of-the-art methods across various backend ISAs and device topologies. More broadly, this work establishes a coherent method for co-exploration of program patterns, quantum ISAs, and hardware topologies, yielding concrete guidelines for hardware-software co-design.