Analytical Modeling of Asynchronous Event-Driven Readout Architectures Using Queueing Theory

TL;DR

This paper introduces an analytical queueing theory framework for modeling asynchronous event-driven readout architectures, enabling rapid design optimization and understanding of performance trade-offs.

Contribution

It develops a closed-form analytical model for asynchronous arbiter trees using queueing theory, accurately predicting performance and aiding design choices.

Findings

Model matches physical prototype results under various traffic conditions.

Reducing fan-in improves latency and reduces loss.

The framework enables rapid architectural sizing and optimization.

Abstract

Event-driven imagers and sensor arrays commonly employ asynchronous arbiter trees with a synchronous acknowledge to serialize requests. We present an analytical framework that models the root as an \(M/D/1\) queue with deterministic quantum \(T\) and implements losses at the sources through one-slot gating. The admitted rate, loss probability, utilization, and mean sojourn time are coupled by self-consistent relations; a closed form for \(\mathbb{E}[S_t]\) separates fixed path delay \(\tau_0\) from queueing effects. The framework matches post-layout results of a physical prototype over light to heavy traffic, reproducing saturation at \(1/T\) and the observed latency growth, while classical \(M/G/1/K\) and Engset-type abstractions diverge at higher occupancy. Because all relations are algebraic, they enable rapid sizing at design time, including the impact of partitioning into independent tiles: reducing fan-in lowers arbitration depth and \(\tau_0\), decreases loss, and improves latency at fixed \(T\), with throughput adding across tiles. The model thereby links architectural parameters to performance metrics and supports selection of acknowledge period, tiling, and link count under practical constraints.