Ultrafast Reconfigurable Topological Photonic Processing Accelerator

TL;DR

This paper presents a wafer-scale topological photonic chip that enables ultrafast, energy-efficient, and reconfigurable AI processing with unprecedented computational density and throughput, surpassing existing photonic platforms.

Contribution

Introduction of a topological photonic computing chip utilizing ferroelectric PZT films for ultra-fast, reconfigurable AI processing with high density and throughput.

Findings

Achieves 266 trillion operations/sec/mm² density

Provides 1.92 TOPS throughput with high accuracy

Enables zero-static-power reconfiguration

Abstract

The rise of artificial intelligence has triggered exponential growth in data volume, demanding rapid and efficient processing. High-speed, energy-efficient, and parallel-scalable computing hardware is thus increasingly critical. We demonstrate a wafer-scale non-volatile topological photonic computing chip using topological modulators. Leveraging the GHz-speed electro-optic response and nonvolatility of ferroelectric lead zirconate titanate (PZT) thin films via topological photonic confinement, Our chip enables thousand-fold faster reconfiguration, zero-static-power operation, and a computational density of 266 trillion operations per second per square millimeter . This density surpasses that of silicon photonic reconfigurable computing chips by two orders of magnitude and thin-film lithium niobate platforms by four orders of magnitude. A 16-channel wavelength-space multiplexed chip delivers 1.92 TOPS throughput with 95.64% digit-recognition accuracy and 94.5% precision for solving time-varying partial differential equations. Additionally, the chip supports functional reconfiguration for high bandwidth density optical I/O. This work establishes ferroelectric topological photonics for efficient high-speed photonic tensor processing.