Design and Optimization of Mixed-Kernel Mixed-Signal SVMs for Flexible Electronics

TL;DR

This paper introduces a novel mixed-kernel mixed-signal SVM design for flexible electronics, balancing accuracy and hardware costs, achieving higher accuracy and significant reductions in area and power compared to existing solutions.

Contribution

It presents the first co-optimized mixed-kernel and mixed-signal SVM architecture tailored for flexible electronics, unifying linear and RBF kernels in digital and analog domains.

Findings

7.7% higher accuracy than single-kernel linear SVMs

108x reduction in area compared to digital RBF implementations

17x reduction in power consumption compared to digital RBF implementations

Abstract

Flexible Electronics (FE) have emerged as a promising alternative to silicon-based technologies, offering on-demand low-cost fabrication, conformality, and sustainability. However, their large feature sizes severely limit integration density, imposing strict area and power constraints, thus prohibiting the realization of Machine Learning (ML) circuits, which can significantly enhance the capabilities of relevant near-sensor applications. Support Vector Machines (SVMs) offer high accuracy in such applications at relatively low computational complexity, satisfying FE technologies' constraints. Existing SVM designs rely solely on linear or Radial Basis Function (RBF) kernels, forcing a trade-off between hardware costs and accuracy. Linear kernels, implemented digitally, minimize overhead but sacrifice performance, while the more accurate RBF kernels are prohibitively large in digital, and their analog realization contains inherent functional approximation. In this work, we propose the first mixed-kernel and mixed-signal SVM design in FE, which unifies the advantages of both implementations and balances the cost/accuracy trade-off. To that end, we introduce a co-optimization approach that trains our mixed-kernel SVMs and maps binary SVM classifiers to the appropriate kernel (linear/RBF) and domain (digital/analog), aiming to maximize accuracy whilst reducing the number of costly RBF classifiers. Our designs deliver 7.7% higher accuracy than state-of-the-art single-kernel linear SVMs, and reduce area and power by 108x and 17x on average compared to digital RBF implementations.