LaMoS: Enabling Efficient Large Number Modular Multiplication through SRAM-based CiM Acceleration

TL;DR

LaMoS is a novel SRAM-based computing-in-memory design that significantly accelerates large-number modular multiplication, crucial for cryptography, by improving scalability and efficiency over existing methods.

Contribution

We introduce LaMoS, a scalable SRAM-based CiM architecture optimized for high bit-width modular multiplication, addressing limitations of prior low-bit and inefficient large-number approaches.

Findings

LaMoS achieves a 7.02× speedup over existing SRAM-based CiM designs.

It reduces scaling costs for high bit-width modular multiplication.

The design improves performance for cryptographic applications like ECC and RSA.

Abstract

Barrett's algorithm is one of the most widely used methods for performing modular multiplication, a critical nonlinear operation in modern privacy computing techniques such as homomorphic encryption (HE) and zero-knowledge proofs (ZKP). Since modular multiplication dominates the processing time in these applications, computational complexity and memory limitations significantly impact performance. Computing-in-Memory (CiM) is a promising approach to tackle this problem. However, existing schemes currently suffer from two main problems: 1) Most works focus on low bit-width modular multiplication, which is inadequate for mainstream cryptographic algorithms such as elliptic curve cryptography (ECC) and the RSA algorithm, both of which require high bit-width operations; 2) Recent efforts targeting large number modular multiplication rely on inefficient in-memory logic operations, resulting in high scaling costs for larger bit-widths and increased latency. To address these issues, we propose LaMoS, an efficient SRAM-based CiM design for large-number modular multiplication, offering high scalability and area efficiency. First, we analyze the Barrett's modular multiplication method and map the workload onto SRAM CiM macros for high bit-width cases. Additionally, we develop an efficient CiM architecture and dataflow to optimize large-number modular multiplication. Finally, we refine the mapping scheme for better scalability in high bit-width scenarios using workload grouping. Experimental results show that LaMoS achieves a $7.02\times$ speedup and reduces high bit-width scaling costs compared to existing SRAM-based CiM designs.